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1 IPT65R195G7 rev.2.1,2016-03-14 final data sheet hsof mosfet 650vcoolmosac7goldseries(g7)powertransistor thec7goldseries(g7)forthefirsttimebringstogetherthebenefitsof thec7goldcoolmos?technology,4pinkelvinsourcecapabilityand theimprovedthermalpropertiesofthetollpackagetoenableapossible smdsolutionforhighcurrenttopologiessuchaspfcupto3kw features ?c7goldgivesbestinclassfomr ds(on) *e oss andr ds(on) *q g . ?c7goldtechnologyenablesbestinclassr ds(on) insmallestfootprint. ?tollpackagehasinbuilt4 th pinkelvinsourceconfigurationandlow parasiticsourceinductance(~1nh). ?tollpackageismsl1compliant,totalpb-free,haseasyvisual inspectiongroovedleadsandisqualifiedforindustrialapplications accordingtojedec(j-std20andjesd22). ?tollsmdpackagecombinedwithleadfreedieattachprocessenables improvedthermalperformancer th . benefits ?c7goldfomr ds(on) *q g is14%betterthanpreviousc7650venabling fasterswitchingleadingtohigherefficiency. ?c7goldcanreach33m w inintoll115mm 2 footprint,whereasprevious bicc7650vwas45m w in150mm 2 d 2 pakfootprint. ?reducingparasiticsourceinductancebykelvinsourceimproves efficiencybyfasterswitchingandeaseofuseduetolessringing. ?tollpackageiseasytouseandhasthehighestqualitystandards. ?improvedthermalsenablesmdtollpackagetobeusedinhigher currentdesignsthanhasbeenpreviouslypossible. applications pfcstagesandhardswitchingpwmstagesfore.g.computing,server, telecom,upsandsolar. pleasenote:formosfetparallelingtheuseofferritebeadsonthegate orseparatetotempolesisgenerallyrecommended. table1keyperformanceparameters parameter value unit v ds @ t j,max 700 v r ds(on),max 195 m w q g.typ 20 nc i d,pulse 41 a i d,continuous @ t j <150c 18 a e oss @400v 2.3 j body diode di/dt 60 a/s type/orderingcode package marking relatedlinks IPT65R195G7 pg-hsof-8 65c7195g see appendix a t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
2 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet tableofcontents description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 appendix a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
3 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet 1maximumratings at t j =25c,unlessotherwisespecified table2maximumratings values min. typ. max. parameter symbol unit note/testcondition continuous drain current 1) i d - - - - 14 9 a t c =25c t c =100c pulsed drain current 2) i d,pulse - - 41 a t c =25c avalanche energy, single pulse e as - - 48 mj i d =4.8a; v dd =50v; see table 10 avalanche energy, repetitive e ar - - 0.24 mj i d =4.8a; v dd =50v; see table 10 avalanche current, single pulse i as - - 4.8 a - mosfet dv/dt ruggedness dv/dt - - 100 v/ns v ds =0...400v gate source voltage (static) v gs -20 - 20 v static; gate source voltage (dynamic) v gs -30 - 30 v ac (f>1 hz) power dissipation p tot - - 97 w t c =25c storage temperature t stg -55 - 150 c - operating junction temperature t j -55 - 150 c - mounting torque - - - n.a. ncm - continuous diode forward current i s - - 14 a t c =25c diode pulse current 2) i s,pulse - - 41 a t c =25c reverse diode dv/dt 3) dv/dt - - 1 v/ns v ds =0...400v, i sd <= i s , t j =25c see table 8 maximum diode commutation speed di f /dt - - 60 a/ m s v ds =0...400v, i sd <= i s , t j =25c see table 8 insulation withstand voltage v iso - - n.a. v v rms , t c =25c, t =1min 1) limited by t j max . 2) pulse width t p limited by t j,max 3) identical low side and high side switch t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
4 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet 2thermalcharacteristics table3thermalcharacteristics values min. typ. max. parameter symbol unit note/testcondition thermal resistance, junction - case r thjc - - 1.29 c/w - thermal resistance, junction - ambient r thja - - 62 c/w device on pcb, minimal footprint thermal resistance, junction - ambient for smd version r thja - 35 45 c/w device on 40mm*40mm*1.5mm epoxy pcb fr4 with 6cm2 (one layer, 70m thickness) copper area for drain connection and cooling. pcb is vertical without air stream cooling. soldering temperature, wave- & reflow soldering allowed t sold - - 260 c reflow msl1 t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
5 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet 3electricalcharacteristics at t j =25c,unlessotherwisespecified table4staticcharacteristics values min. typ. max. parameter symbol unit note/testcondition drain-source breakdown voltage v (br)dss 650 - - v v gs =0v, i d =1ma gate threshold voltage v (gs)th 3 3.5 4 v v ds = v gs , i d =0.24ma zero gate voltage drain current i dss - - - 10 1 - m a v ds =650, v gs =0v, t j =25c v ds =650, v gs =0v, t j =150c gate-source leakage current i gss - - 100 na v gs =20v, v ds =0v drain-source on-state resistance r ds(on) - - 0.170 0.424 0.195 - w v gs =10v, i d =4.8a, t j =25c v gs =10v, i d =4.8a, t j =150c gate resistance r g - 1.2 - w f =1mhz,opendrain table5dynamiccharacteristics values min. typ. max. parameter symbol unit note/testcondition input capacitance c iss - 996 - pf v gs =0v, v ds =400v, f =250khz output capacitance c oss - 14 - pf v gs =0v, v ds =400v, f =250khz effective output capacitance, energy related 1) c o(er) - 29 - pf v gs =0v, v ds =0...400v effective output capacitance, time related 2) c o(tr) - 313 - pf i d =constant, v gs =0v, v ds =0...400v turn-on delay time t d(on) - 9 - ns v dd =400v, v gs =13v, i d =4.8a, r g =10 w ;seetable9 rise time t r - 5 - ns v dd =400v, v gs =13v, i d =4.8a, r g =10 w ;seetable9 turn-off delay time t d(off) - 46 - ns v dd =400v, v gs =13v, i d =4.8a, r g =10 w ;seetable9 fall time t f - 9 - ns v dd =400v, v gs =13v, i d =4.8a, r g =10 w ;seetable9 table6gatechargecharacteristics values min. typ. max. parameter symbol unit note/testcondition gate to source charge q gs - 5 - nc v dd =400v, i d =4.8a, v gs =0to10v gate to drain charge q gd - 6 - nc v dd =400v, i d =4.8a, v gs =0to10v gate charge total q g - 20 - nc v dd =400v, i d =4.8a, v gs =0to10v gate plateau voltage v plateau - 5.4 - v v dd =400v, i d =4.8a, v gs =0to10v 1) c o(er) isafixedcapacitancethatgivesthesamestoredenergyas c oss while v ds isrisingfrom0to400v 2) c o(tr) isafixedcapacitancethatgivesthesamechargingtimeas c oss while v ds isrisingfrom0to400v t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
6 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet table7reversediodecharacteristics values min. typ. max. parameter symbol unit note/testcondition diode forward voltage v sd - 0.9 - v v gs =0v, i f =4.8a, t j =25c reverse recovery time t rr - 500 - ns v r =400v, i f =4.8a,d i f /d t =60a/s; see table 8 reverse recovery charge q rr - 2.8 - c v r =400v, i f =4.8a,d i f /d t =60a/s; see table 8 peak reverse recovery current i rrm - 12.5 - a v r =400v, i f =4.8a,d i f /d t =60a/s; see table 8 t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
7 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet 4electricalcharacteristicsdiagrams diagram1:powerdissipation t c [c] p tot [w] 0 25 50 75 100 125 150 0 10 20 30 40 50 60 70 80 90 100 p tot =f( t c ) diagram2:safeoperatingarea v ds [v] i d [a] 10 0 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 1 10 2 1 s 10 s 100 s 1 ms 10 ms dc i d =f( v ds ); t c =25c; d =0;parameter: t p diagram3:safeoperatingarea v ds [v] i d [a] 10 0 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 1 10 2 1 s 10 s 100 s 1 ms 10 ms dc i d =f( v ds ); t c =80c; d =0;parameter: t p diagram4:max.transientthermalimpedance t p [s] z thjc [k/w] 10 -5 10 -4 10 -3 10 -2 10 -1 10 -2 10 -1 10 0 10 1 0.5 0.2 0.1 0.05 0.02 0.01 single pulse z thjc =f( t p );parameter: d=t p / t t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
8 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet diagram5:typ.outputcharacteristics v ds [v] i d [a] 0 5 10 15 20 0 10 20 30 40 50 20 v 10 v 8 v 7 v 6 v 5.5 v 5 v 4.5 v i d =f( v ds ); t j =25c;parameter: v gs diagram6:typ.outputcharacteristics v ds [v] i d [a] 0 5 10 15 20 0 5 10 15 20 25 30 20 v 10 v 8 v 7 v 6 v 5.5 v 5 v 4.5 v i d =f( v ds ); t j =125c;parameter: v gs diagram7:typ.drain-sourceon-stateresistance i d [a] r ds(on) [ w ] 0 5 10 15 20 25 30 0.3 0.4 0.5 0.6 0.7 0.8 20 v 5.5 v 6 v 6.5 v 7 v 10 v r ds(on) =f( i d ); t j =125c;parameter: v gs diagram8:drain-sourceon-stateresistance t j [c] r ds(on) [ w ] -50 -25 0 25 50 75 100 125 150 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 98% typ r ds(on) =f( t j ); i d =4.8a; v gs =10v t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
9 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet diagram9:typ.transfercharacteristics v gs [v] i d [a] 0 2 4 6 8 10 12 0 5 10 15 20 25 30 35 40 45 50 150 c 25 c i d =f( v gs ); v ds =20v;parameter: t j diagram10:typ.gatecharge q gate [nc] v gs [v] 0 5 10 15 20 25 0 2 4 6 8 10 12 400 v 120 v v gs =f( q gate ); i d =4.8apulsed;parameter: v dd diagram11:forwardcharacteristicsofreversediode v sd [v] i f [a] 0.0 0.5 1.0 1.5 10 -1 10 0 10 1 10 2 125 c 25 c i f =f( v sd );parameter: t j diagram12:avalancheenergy t j [c] e as [mj] 25 50 75 100 125 150 0 5 10 15 20 25 30 35 40 45 50 e as =f( t j ); i d =4.8a; v dd =50v t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
10 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet diagram13:drain-sourcebreakdownvoltage t j [c] v br(dss) [v] -60 -20 20 60 100 140 180 580 600 620 640 660 680 700 720 740 760 v br(dss) =f( t j ); i d =1ma diagram14:typ.capacitances v ds [v] c [pf] 0 100 200 300 400 500 10 0 10 1 10 2 10 3 10 4 10 5 ciss coss crss c =f( v ds ); v gs =0v; f =250khz diagram15:typ.cossstoredenergy v ds [v] e oss [j] 0 100 200 300 400 500 0.0 0.5 1.0 1.5 2.0 2.5 3.0 e oss = f (v ds ) t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2
11 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet 5testcircuits table8diodecharacteristics table9switchingtimes(ss) table10unclampedinductiveload(ss) t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v ( br ) ds i d v ds v ds i d
12 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet 6packageoutlines figure1outlinepg-hsof-8 t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v ( br ) ds i d v ds v ds i d z8b00176939 revision issue date european projection 01 28-04-2015 document no. e5 e4 k1 e millimeters a dim min max inches min max b1 c d d2 e e1 n l 2.20 2.40 0.087 0.094 9.70 0.40 10.28 9.70 9.90 0.60 10.58 10.10 0.382 0.016 0.405 0.382 0.390 0.024 0.416 0.398 8 8 1.20 (bsc) 0.047 (bsc) b 0.70 0.90 0.028 0.035 1) partially covered with mold flash b2 0.42 0.50 0.017 0.020 h h1 11.48 11.88 0.452 0.468 h2 7.15 0.281 h3 3.59 0.141 h4 3.26 0.128 l1 0.50 0.90 0.020 0.035 3.30 0.130 7.50 0.295 8.50 0.335 9.46 0.372 6.55 6.75 0.258 0.266 4.18 0.165 l4 1.00 1.30 0.039 0.051 l2 0.50 0.70 0.020 0.028 2 scale 0 4mm 0 2 l5 2.62 2.81 0.103 0.111 1.40 1.80 0.055 0.071
13 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet 7appendixa table11relatedlinks ? ifxcoolmos tm c7webpage: www.infineon.com ? ifxcoolmos tm c7applicationnote: www.infineon.com ? ifxcoolmos tm c7simulationmodel: www.infineon.com ? ifxdesigntools: www.infineon.com t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v ( br ) ds i d v ds v ds i d z8b00176939 revision issue date european projection 01 28-04-2015 document no. e5 e4 k1 e millimeters a dim min max inches min max b1 c d d2 e e1 n l 2.20 2.40 0.087 0.094 9.70 0.40 10.28 9.70 9.90 0.60 10.58 10.10 0.382 0.016 0.405 0.382 0.390 0.024 0.416 0.398 8 8 1.20 (bsc) 0.047 (bsc) b 0.70 0.90 0.028 0.035 1) partially covered with mold flash b2 0.42 0.50 0.017 0.020 h h1 11.48 11.88 0.452 0.468 h2 7.15 0.281 h3 3.59 0.141 h4 3.26 0.128 l1 0.50 0.90 0.020 0.035 3.30 0.130 7.50 0.295 8.50 0.335 9.46 0.372 6.55 6.75 0.258 0.266 4.18 0.165 l4 1.00 1.30 0.039 0.051 l2 0.50 0.70 0.020 0.028 2 scale 0 4mm 0 2 l5 2.62 2.81 0.103 0.111 1.40 1.80 0.055 0.071
14 650vcoolmosac7goldseries(g7)powertransistor IPT65R195G7 rev.2.1,2016-03-14 final data sheet revisionhistory IPT65R195G7 revision:2016-03-14,rev.2.1 previous revision revision date subjects (major changes since last revision) 2.0 2016-03-01 release of final version 2.1 2016-03-14 page 1 format update trademarksofinfineontechnologiesag aurix?,c166?,canpak?,cipos?,coolgan?,coolmos?,coolset?,coolsic?,corecontrol?,crossave?,dave?,di-pol?,drblade?, easypim?,econobridge?,econodual?,econopack?,econopim?,eicedriver?,eupec?,fcos?,hitfet?,hybridpack?,infineon?, isoface?,isopack?,i-wafer?,mipaq?,modstack?,my-d?,novalithic?,omnitune?,optiga?,optimos?,origa?,powercode?, primarion?,primepack?,primestack?,profet?,pro-sil?,rasic?,real3?,reversave?,satric?,sieget?,sipmos?,smartlewis?, solidflash?,spoc?,tempfet?,thinq?,trenchstop?,tricore?. trademarksupdatedaugust2015 othertrademarks allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. welistentoyourcomments anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com publishedby infineontechnologiesag 81726mnchen,germany ?2016infineontechnologiesag allrightsreserved. legaldisclaimer theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.with respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. information forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestinfineon technologiesoffice( www.infineon.com ). warnings duetotechnicalrequirements,componentsmaycontaindangeroussubstances.forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. theinfineontechnologiescomponentdescribedinthisdatasheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. t ab 1 2 3 4 5 8 6 7 drain tab gate pin 1 source pin 3-8 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v ( br ) ds i d v ds v ds i d z8b00176939 revision issue date european projection 01 28-04-2015 document no. e5 e4 k1 e millimeters a dim min max inches min max b1 c d d2 e e1 n l 2.20 2.40 0.087 0.094 9.70 0.40 10.28 9.70 9.90 0.60 10.58 10.10 0.382 0.016 0.405 0.382 0.390 0.024 0.416 0.398 8 8 1.20 (bsc) 0.047 (bsc) b 0.70 0.90 0.028 0.035 1) partially covered with mold flash b2 0.42 0.50 0.017 0.020 h h1 11.48 11.88 0.452 0.468 h2 7.15 0.281 h3 3.59 0.141 h4 3.26 0.128 l1 0.50 0.90 0.020 0.035 3.30 0.130 7.50 0.295 8.50 0.335 9.46 0.372 6.55 6.75 0.258 0.266 4.18 0.165 l4 1.00 1.30 0.039 0.051 l2 0.50 0.70 0.020 0.028 2 scale 0 4mm 0 2 l5 2.62 2.81 0.103 0.111 1.40 1.80 0.055 0.071

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